SystemVerilog for verification :

Spear, Chris

SystemVerilog for verification : a guide to learning the testbench language features by Chris Spear, Greg Tumbush. - 3rd ed. - New York : Springer, ©2012. - xliii, 464 p. : ill. ; 24 cm.

Includes bibliographical references and index.

9781489995001


SystemVerilog (Computer hardware description language)
Integrated circuits--Verification.

621.392 / SPE-S
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