Formal verification :
Seligman, Erik
Formal verification : an essential toolkit for modern VLSI design by Erik Seligman, Tom Schubert and M. V. Achutha Kiran Kumar - Oxford : Elsevier, ©2015 - xviii, 391 p. ; 23cm.
Included index
9780128007273
Verilog
Electronic circuits testing
Electronic circuits testing
Electronic circuits
621.3815 / SEL-F
Formal verification : an essential toolkit for modern VLSI design by Erik Seligman, Tom Schubert and M. V. Achutha Kiran Kumar - Oxford : Elsevier, ©2015 - xviii, 391 p. ; 23cm.
Included index
9780128007273
Verilog
Electronic circuits testing
Electronic circuits testing
Electronic circuits
621.3815 / SEL-F