Logic synthesis and verification algorithms
Hachtel, Gary D.
Logic synthesis and verification algorithms Gary Hachtel, Fabio Somenzi. - New York : Springer, c2006. - xxxii, 564 p. : ill. ; 26 cm.
Includes bibliographical references (p. 537-553) and index.
9788181284839
2005937330
Integrated circuits--Very large scale integration--Design--Data processing.
Logic design--Data processing.
Integrated circuits--Verification.
Computer-aided design.
TK7874.75 / .H33 2006
621.395 / HAC-L
Logic synthesis and verification algorithms Gary Hachtel, Fabio Somenzi. - New York : Springer, c2006. - xxxii, 564 p. : ill. ; 26 cm.
Includes bibliographical references (p. 537-553) and index.
9788181284839
2005937330
Integrated circuits--Very large scale integration--Design--Data processing.
Logic design--Data processing.
Integrated circuits--Verification.
Computer-aided design.
TK7874.75 / .H33 2006
621.395 / HAC-L