Logic Synthesis for VLSI-Based Combined Finite State Machines (Record no. 174734)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 04178nam a22005655i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-031-16027-1 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240423125137.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 221124s2022 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9783031160271 |
| -- | 978-3-031-16027-1 |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1007/978-3-031-16027-1 |
| Source of number or code | doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7867-7867.5 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TJFC |
| Source | bicssc |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TEC008010 |
| Source | bisacsh |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TJFC |
| Source | thema |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| Edition number | 23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Barkalov, Alexander. |
| Relator term | author. |
| Relator code | aut |
| -- | http://id.loc.gov/vocabulary/relators/aut |
| 245 10 - TITLE STATEMENT | |
| Title | Logic Synthesis for VLSI-Based Combined Finite State Machines |
| Medium | [electronic resource] : |
| Remainder of title | Synthesis Targeting ASICs, CPLDs and FPGAs / |
| Statement of responsibility, etc | by Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka. |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2022. |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2022. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | XV, 291 p. 270 illus. |
| Other physical details | online resource. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Electrical Engineering, |
| International Standard Serial Number | 1876-1119 ; |
| Volume number/sequential designation | 922 |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Control algorithms and finite state machines -- VLSI-based logic synthesis -- ASIC-based synthesis of CFSMs -- Optimization of ASIC-based CFSMs -- Homogenous CPLD-based synthesis of CFSMs. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration. This is the first book entirely devoted to the problems associated with synthesis and optimization of VLSI-based CFSMs. We hope that the book will be interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of various digital systems. We think that proposed CFSM models enlarge the class of models applied for implementation of control units with modern VLSI chips. . |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Control engineering. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Control and Systems Theory. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Titarenko, Larysa. |
| Relator term | author. |
| Relator code | aut |
| -- | http://id.loc.gov/vocabulary/relators/aut |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Mielcarek, Kamil. |
| Relator term | author. |
| Relator code | aut |
| -- | http://id.loc.gov/vocabulary/relators/aut |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Mazurkiewicz, Małgorzata. |
| Relator term | author. |
| Relator code | aut |
| -- | http://id.loc.gov/vocabulary/relators/aut |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Kawecka, Elżbieta. |
| Relator term | author. |
| Relator code | aut |
| -- | http://id.loc.gov/vocabulary/relators/aut |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY | |
| Title | Springer Nature eBook |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9783031160264 |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9783031160288 |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9783031160295 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| Uniform title | Lecture Notes in Electrical Engineering, |
| -- | 1876-1119 ; |
| Volume number/sequential designation | 922 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | <a href="https://doi.org/10.1007/978-3-031-16027-1">https://doi.org/10.1007/978-3-031-16027-1</a> |
| 912 ## - | |
| -- | ZDB-2-SCS |
| 912 ## - | |
| -- | ZDB-2-SXCS |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks-CSE-Springer |
No items available.