MARC details
| 000 -LEADER |
|---|
| fixed length control field |
01309nam a22003617i 4500 |
| 001 - CONTROL NUMBER |
|---|
| control field |
20097045 |
| 003 - CONTROL NUMBER IDENTIFIER |
|---|
| control field |
IIITD |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20210206170149.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
171026t20172017nyua b 001 0 eng c |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
|---|
| LC control number |
2017446855 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9789387067509 |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(OCoLC)ocn959648624 |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
YDX |
| Language of cataloging |
eng |
| Transcribing agency |
YDX |
| Description conventions |
rda |
| Modifying agency |
OCLCQ |
| -- |
TEF |
| -- |
BDX |
| -- |
YDX |
| -- |
OCLCF |
| -- |
OSU |
| -- |
DLC |
| 042 ## - AUTHENTICATION CODE |
|---|
| Authentication code |
pcc |
| 050 00 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7895.G36 |
| Item number |
U57 2017 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621 |
| Item number |
UNS-D |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Unsalan, Cem |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Digital system design with FPGA : |
| Remainder of title |
implementation using Verilog and VHDL |
| Statement of responsibility, etc |
by Cem Ünsaln and Bora Tar. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Place of publication, distribution, etc |
Delhi : |
| Name of publisher, distributor, etc |
McGraw-Hill, |
| Date of publication, distribution, etc |
©2017. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xv, 384 p. : |
| Other physical details |
ill. ; |
| Dimensions |
25 cm. |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Indian ed. |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
|---|
| Bibliography, etc |
Includes bibliographical references and index. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Field programmable gate arrays. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Verilog (Computer hardware description language) |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
VHDL (Computer hardware description language) |
| 650 #7 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Field programmable gate arrays. |
| Source of heading or term |
fast |
| 650 #7 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Verilog (Computer hardware description language) |
| Source of heading or term |
fast |
| 650 #7 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
VHDL (Computer hardware description language) |
| Source of heading or term |
fast |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Tar, Bora |
| 906 ## - LOCAL DATA ELEMENT F, LDF (RLIN) |
|---|
| a |
7 |
| b |
cbc |
| c |
pccadap |
| d |
2 |
| e |
ncip |
| f |
20 |
| g |
y-gencatlg |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Dewey Decimal Classification |
| Koha item type |
Books |
| Koha issues (borrowed), all copies |
10 |
