Low-power CMOS VLSI circuit design
Material type: TextPublication details: New Delhi : Wiley, c2000.Description: xv, 359 p. : ill. ; 25 cmISBN:- 9788126520237
- 621.395 21 ROY-L
- TK7874.66 .R69 2000
Item type | Current library | Collection | Call number | Status | Date due | Barcode | Item holds |
---|---|---|---|---|---|---|---|
Books | IIITD General Stacks | Electronics and Communication Engineering | 621.395 ROY-L (Browse shelf(Opens below)) | Available | 002618 |
Total holds: 0
Browsing IIITD shelves, Shelving location: General Stacks, Collection: Electronics and Communication Engineering Close shelf browser (Hides shelf browser)
621.395 RAJ-V VLSI design | 621.395 RAM-D Digital VLSI systems design : | 621.395 RAS-S System-On-A-Chip verification : | 621.395 ROY-L Low-power CMOS VLSI circuit design | 621.395 SAC-D Defect-oriented testing for nano-metric CMOS VLSI circuits | 621.395 SAS-S Switching theory for logic synthesis | 621.395 SAU-I Introduction to VLSI design flow |
"A Wiley-Interscience publication."
Includes bibliographical references and index.
There are no comments on this title.