Nano, quantum and molecular computing : implications to high level design and validation
Material type: TextPublication details: New Delhi : Springer, c2004.Description: xvi, 358 p. ; 25 cmISBN:- 9788184893717
- 004.1 22 SHU-N
- QA76.889 .N36 2004
Item type | Current library | Collection | Call number | Status | Date due | Barcode | Item holds |
---|---|---|---|---|---|---|---|
Reference | IIITD Reference | Computing Books by India-based Author | CBIA 004.1 SHU-N (Browse shelf(Opens below)) | Loan on demand | 002445 |
Includes bibliographical references.
Pt. I. Nano-computing at the physical layer -- 1. Nanometer scale technologies : device considerations / Arijit Raychowdhury and Kaushik Roy -- Pt. II. Defect tolerant nano-computing -- 2. Nanocomputing in the presence of defects and faults : a survey / Paul Graham and Maya Gokhale -- 3. Defect tolerance at the end of the roadmap / Mahim Mishra and Seth C. Goldstein -- 4. Obtaining quadrillion-transistor logic systems despite imperfect manufacture, hardware failure, and incomplete system specification / Lisa J. K. Durbeck and Nicholas J. Macias -- 5. A probabilistic-based design for nanoscale computation / R. Iris Bahar, Jie Chen and Joseph Mundy -- 6. Evaluating reliability trade-offs for nano-architectures / Debayan Bhaduri and Sandeep K. Shukla -- 7. Law of large numbers system design / Andre DeHon -- Pt. III. Nano-scale quantum computing -- 8. Challenges in reliable quantum computing / Diana Franklin and Frederic T. Chong -- 9. Origins and motivations for design rules in QCA / Michael T. Niemier and Peter M. Kogge -- 10. Partitioning and placement for buildable QCA circuits / Sung Kyu Lim and Mike Niemier -- Pt. IV. Validation of nano-scale architectures -- 11. Verification of large scale nano systems with unreliable nano devices / Michael S. Hsiao, Shuo Sheng, Rajat Arora, Ankur Jain and Vamsi Boppana.
"This volume contains research material as well as new ideas that will be useful for someone starting research in the arena of nano computing, not at the device level, but the problems one would face at system level design and validation when nano-scopic physicality will be present at the device level."--BOOK JACKET.
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