000 00833nam a22002417a 4500
003 IIITD
005 20240215020003.0
008 200215b xxu||||| |||| 00| 0 eng d
020 _a9781489995001
035 _a(OCoLC)ocn753872650
040 _aYDXCP
_cYDXCP
_dBWX
_dBTCTA
_dCDX
_dWAU
_dDLC
082 0 0 _a621.392
_bSPE-S
100 1 _aSpear, Chris
245 1 0 _aSystemVerilog for verification :
_ba guide to learning the testbench language features
_cby Chris Spear, Greg Tumbush.
250 _a3rd ed.
260 _aNew York :
_bSpringer,
_c©2012.
300 _axliii, 464 p. :
_bill. ;
_c24 cm.
504 _aIncludes bibliographical references and index.
650 0 _aSystemVerilog (Computer hardware description language)
650 0 _aIntegrated circuits
_xVerification.
700 1 _aTumbush, Greg
942 _2ddc
_cBK
_03
999 _c117442
_d117442