000 | 00840nam a2200265 a 4500 | ||
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001 | 729272 | ||
003 | IIITD | ||
005 | 20240925020004.0 | ||
008 | 990623s1999 paua b 001 0 eng | ||
010 | _a 98061678 | ||
020 | _a9788178001425 | ||
040 |
_aDLC _cDLC |
||
050 | 0 | 0 |
_aTK7885.7 _b.B528 1999 |
082 |
_a621.392 _bBHA-V |
||
100 | 1 | _aBhasker, J. | |
245 | 1 | 2 |
_aA Verilog HDL primer _cJ. Bhasker. |
250 | _a3rd ed. | ||
260 |
_aHyderabad: _bBS Publictions, _c©2005. |
||
300 |
_axxii, 378 p. : _bill. ; _c25 cm. |
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504 | _aIncludes bibliographical references and index. | ||
650 | 0 | _aVerilog (Computer hardware description language) | |
906 |
_a7 _bcbc _corignew _d2 _eopcn _f19 _gy-gencatlg |
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942 |
_2ddc _cBK _028 |
||
999 |
_c12617 _d12617 |