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020			_a9783642361579 _9978-3-642-36157-9
024	7		_a10.1007/978-3-642-36157-9 _2doi
050		4	_aQA76.9.E94
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245	1	0	_aIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation _h[electronic resource] : _b22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012, Revised Selected Papers / _cedited by José L. Ayala, Delong Shang, Alex Yakovlev.
250			_a1st ed. 2013.
264		1	_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2013.
300			_aIX, 258 p. 150 illus. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	1		_aTheoretical Computer Science and General Issues, _x2512-2029 ; _v7606
505	0		_aSleep-Transistor Based Power-Gating Tradeoff Analyses -- Modelling and Analysis of Manufacturing Variability Effects from Process to Architectural Level -- Non-invasive Power Simulation at System-Level with SystemC -- A Standard Cell Optimization Method for Near-Threshold Voltage Operations -- An Extended Metastability Simulation Method for Synchronizer Characterization -- Phase Space Based NBTI Model -- Fast Propagation of Hamming and Signal Distances for Register-Transfer Level Datapaths -- Noise Margin Based Library Optimization Considering Variability in Sub-threshold -- TCP Window Based DVFS for Low Power Network Controller SoC -- A Generic Architecture for Robust Asynchronous Communication Links -- Direct Statistical Simulation of Timing Properties in Sequential Circuits -- On-Chip NBTI and PBTI Tracking through an All-Digital Aging Monitor Architecture -- Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications -- Design of a 150 mV Supply, 2 MIPS, 90nm CMOS, Ultra-Low-Power Microprocessor -- Run-Time Measurement of Harvested Energy for Autarkic Sensor Operation -- Observability Conditions and Automatic Operand-Isolation in High-Throughput Asynchronous Pipelines -- Dynamic Power Management of a Computer with Self Power-Managed Components -- Case Studies of Logical Computation on Stochastic Bit Streams.
520			_aThis book constitutes the refereed proceedings of the 22nd International Conference on Integrated Circuit and System Design, PATMOS 2012, held in Newcastle, UK Spain, in September 2012. The 25 revised full papers presented were carefully reviewed and selected from numerous submissions. The paper feature emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems, including reconfigurable hardware such as FPGAs. The technical program focus on timing, performance and power consumption as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization.
650		0	_aElectronic digital computers _xEvaluation.
650		0	_aComputer simulation.
650		0	_aComputer networks .
650		0	_aComputer hardware description languages.
650		0	_aLogic design.
650		0	_aCompilers (Computer programs).
650	1	4	_aSystem Performance and Evaluation.
650	2	4	_aComputer Modelling.
650	2	4	_aComputer Communication Networks.
650	2	4	_aRegister-Transfer-Level Implementation.
650	2	4	_aLogic Design.
650	2	4	_aCompilers and Interpreters.
700	1		_aAyala, José L. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt
700	1		_aShang, Delong. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt
700	1		_aYakovlev, Alex. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt
710	2		_aSpringerLink (Online service)
773	0		_tSpringer Nature eBook
776	0	8	_iPrinted edition: _z9783642361562
776	0	8	_iPrinted edition: _z9783642361586
830		0	_aTheoretical Computer Science and General Issues, _x2512-2029 ; _v7606
856	4	0	_uhttps://doi.org/10.1007/978-3-642-36157-9
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