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_a10.1007/978-3-642-34188-5 _2doi |
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_aHardware and Software: Verification and Testing _h[electronic resource] : _b7th International Haifa Verification Conference, HVC 2011, Haifa, Israel, December 6-8, 2011, Revised Selected Papers / _cedited by Kerstin Eder, João Lourenҫo, Onn Shehory. |
250 | _a1st ed. 2012. | ||
264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2012. |
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300 |
_aXII, 263 p. 95 illus. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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490 | 1 |
_aProgramming and Software Engineering, _x2945-9168 ; _v7261 |
|
505 | 0 | _aPreprocessing and Inprocessing Techniques in SAT -- Pioneering the Future of Verification: A Spiral of Technological and Business Innovation -- Automated Detection and Repair of Concurrency Bugs -- Verification Challenges of Workload Optimized Hardware Systems -- Synthesis with Clairvoyance -- Generalized Reactivity(1) Synthesis without a Monolithic Strategy -- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear Hybrid Automata -- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications -- Liveness vs Safety – A Practical Viewpoint -- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search -- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs -- Concurrent Small Progress Measures -- Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns -- Interpolation-Based Function Summaries in Bounded Model Checking -- Can File Level Characteristics Help Identify System Level Fault-Proneness -- Reverse Coverage Analysis -- Symbolic Testing of OpenCL Code -- Dynamic Test Data Generation for Data Intensive Applications -- Injecting Floating-Point Testing Knowledge into Test Generators -- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE -- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware -- On-Line Detection and Prediction of Temporal Patterns -- Function Summaries in Software Upgrade Checking -- The Rabin Index of Parity Games -- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing. -- ioneering the Future of Verification: A Spiral of Technological and Business Innovation -- Automated Detection and Repair of Concurrency Bugs -- Verification Challenges of Workload Optimized Hardware Systems -- Synthesis with Clairvoyance -- Generalized Reactivity(1) Synthesis without a Monolithic Strategy -- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear HybridAutomata -- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications -- Liveness vs Safety – A Practical Viewpoint -- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search -- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs -- Concurrent Small Progress Measures -- Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns -- Interpolation-Based Function Summaries in Bounded Model Checking -- Can File Level Characteristics Help Identify System Level Fault-Proneness -- Reverse Coverage Analysis -- Symbolic Testing of OpenCL Code -- Dynamic Test Data Generation for Data Intensive Applications -- Injecting Floating-Point Testing Knowledge into Test Generators -- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE -- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware -- On-Line Detection and Prediction of Temporal Patterns -- Function Summaries in Software Upgrade Checking -- The Rabin Index of Parity Games -- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing. | |
520 | _aThis book constitutes the thoroughly refereed post-conference proceedings of the 7th International Haifa Verification Conference, HVC 2011, held in Haifa, Israel in December 2011. The 15 revised full papers presented together with 3 tool papers and 4 posters were carefully reviewed and selected from 43 submissions. The papers are organized in topical sections on synthesis, formal verification, software quality, testing and coverage, experience and tools, and posters- student event. | ||
650 | 0 | _aSoftware engineering. | |
650 | 0 | _aCompilers (Computer programs). | |
650 | 0 | _aComputer science. | |
650 | 0 | _aArtificial intelligence. | |
650 | 1 | 4 | _aSoftware Engineering. |
650 | 2 | 4 | _aCompilers and Interpreters. |
650 | 2 | 4 | _aComputer Science Logic and Foundations of Programming. |
650 | 2 | 4 | _aArtificial Intelligence. |
700 | 1 |
_aEder, Kerstin. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
|
700 | 1 |
_aLourenҫo, João. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
|
700 | 1 |
_aShehory, Onn. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
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710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783642341878 |
776 | 0 | 8 |
_iPrinted edition: _z9783642341892 |
830 | 0 |
_aProgramming and Software Engineering, _x2945-9168 ; _v7261 |
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856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-642-34188-5 |
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