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020 _a9783642119507
_9978-3-642-11950-7
024 7 _a10.1007/978-3-642-11950-7
_2doi
050 4 _aTK5105.5-5105.9
072 7 _aUKN
_2bicssc
072 7 _aCOM043000
_2bisacsh
072 7 _aUKN
_2thema
082 0 4 _a004.6
_223
245 1 0 _aArchitecture of Computing Systems - ARCS 2010
_h[electronic resource] :
_b23rd International Conference, Hannover, Germany, February 22-25, 2010, Proceedings /
_cedited by Christian Müller-Schloer, Wolfgang Karl, Sami Yehia.
250 _a1st ed. 2010.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c2010.
300 _aXIII, 247 p. 105 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aTheoretical Computer Science and General Issues,
_x2512-2029 ;
_v5974
505 0 _aKeynote -- HyVM - Hybrid Virtual Machines - Efficient Use of Future Heterogeneous Chip Multiprocessors -- Processor Design -- How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT -- Complexity-Effective Rename Table Design for Rapid Speculation Recovery -- An Embedded GC Module with Support for Multiple Mutators and Weak References -- Embedded Systems -- A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems -- Autonomic Workload Management for Multi-core Processor Systems -- Firefly Flashing Synchronization as Inspiration for Self-synchronization of Walking Robot Gait Patterns Using a Decentralized Robot Control Architecture -- Organic Computing and Self-organization -- The JoSchKa System: Organic Job Distribution in Heterogeneous and Unreliable Environments -- On Deadlocks and Fairness in Self-organizing Resource-Flow Systems -- Ad-Hoc Information Spread between Mobile Devices: A Case Study in Analytical Modeling of Controlled Self-organization in IT Systems -- Processor Design and Transactional Memory -- MLP-Aware Instruction Queue Resizing: The Key to Power-Efficient Performance -- Exploiting Inactive Rename Slots for Detecting Soft Errors -- Efficient Transaction Nesting in Hardware Transactional Memory -- Energy Management in Distributed Environments and Ad-Hoc Grids -- Decentralized Energy-Management to Control Smart-Home Architectures -- EnergySaving Cluster Roll: Power Saving System for Clusters -- Effect of the Degree of Neighborhood on Resource Discovery in Ad Hoc Grids -- Performance Modelling and Benchmarking -- Compiler-Directed Performance Model Construction for Parallel Programs -- A Method for Accurate High-Level Performance Evaluation of MPSoC Architectures Using Fine-Grained Generated Traces -- JetBench:An Open Source Real-time Multiprocessor Benchmark -- Accelerators and GPUs -- A Tightly Coupled Accelerator Infrastructure for Exact Arithmetics -- Optimizing Stencil Application on Multi-thread GPU Architecture Using Stream Programming Model.
650 0 _aComputer networks .
650 0 _aComputer engineering.
650 0 _aComputer systems.
650 0 _aOperating systems (Computers).
650 0 _aSoftware engineering.
650 0 _aApplication software.
650 1 4 _aComputer Communication Networks.
650 2 4 _aComputer Engineering and Networks.
650 2 4 _aComputer System Implementation.
650 2 4 _aOperating Systems.
650 2 4 _aSoftware Engineering.
650 2 4 _aComputer and Information Systems Applications.
700 1 _aMüller-Schloer, Christian.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aKarl, Wolfgang.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aYehia, Sami.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
710 2 _aSpringerLink (Online service)
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783642119491
776 0 8 _iPrinted edition:
_z9783642119514
830 0 _aTheoretical Computer Science and General Issues,
_x2512-2029 ;
_v5974
856 4 0 _uhttps://doi.org/10.1007/978-3-642-11950-7
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912 _aZDB-2-SXCS
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