| 000 | 04614nam a22006135i 4500 | ||
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| 001 | 978-3-540-49519-2 | ||
| 003 | DE-He213 | ||
| 005 | 20240423132435.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 121227s1998 gw | s |||| 0|eng d | ||
| 020 |
_a9783540495192 _9978-3-540-49519-2 |
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| 024 | 7 |
_a10.1007/3-540-49519-3 _2doi |
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_aUGC _2bicssc |
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_aCOM007000 _2bisacsh |
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| 082 | 0 | 4 |
_a670.285 _223 |
| 245 | 1 | 0 |
_aFormal Methods in Computer-Aided Design _h[electronic resource] : _bSecond International Conference, FMCAD '98, Palo Alto, CA, USA, November 4-6, 1998, Proceedings / _cedited by Ganesh Gopalakrishnan, Phillip Windley. |
| 250 | _a1st ed. 1998. | ||
| 264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c1998. |
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| 300 |
_aX, 538 p. _bonline resource. |
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| 336 |
_atext _btxt _2rdacontent |
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| 337 |
_acomputer _bc _2rdamedia |
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| 338 |
_aonline resource _bcr _2rdacarrier |
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| 347 |
_atext file _bPDF _2rda |
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| 490 | 1 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v1522 |
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| 505 | 0 | _aMinimalist Proof Assistants: Interactions of Technology and Methodology in Formal System Level Verification -- Reducing Manual Abstraction in Formal Verification of Out- of- Order Execution -- Bit-Level Abstraction in the Verification of Pipelined Microprocessors by Correspondence Checking -- Solving Bit-Vector Equations -- The Formal Design of 1M-Gate ASICs -- Design of Experiments for Evaluation of BDD Packages Using Controlled Circuit Mutations -- A Tutorial on Stålmarck’s Proof Procedure for Propositional Logic -- Almana: A BDD Minimization Tool Integrating Heuristic and RewritingMethods -- Bisimulation Minimization in an Automata-Theoretic Verification Framework -- Automatic Verification of Mixed-Level Logic Circuits -- A Timed Automaton-Based Method for Accurate Computation of Circuit Delay in the Presence of Cross-Talk -- Maximum Time Separation of Events in Cyclic Systems with Linear and Latest Timing Constraints -- Using MTBDDs for Composition and Model Checking of Real-Time Systems -- Formal Methods in CAD from an Industrial Perspective -- A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool -- Combined Formal Post- and Presynthesis Verification in High Level Synthesis -- Formalization and Proof of a Solution to the PCI 2.1 Bus Transaction Ordering Problem -- A Performance Study of BDD-Based Model Checking -- Symbolic Model Checking Visualization -- Input Elimination and Abstraction in Model Checking -- Symbolic Simulation of the JEM1 Microprocessor -- Symbolic Simulation: An ACL2 Approach -- Verification of Data-Insensitive Circuits: An In-Order-Retirement Case Study -- Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification -- Formally Verifying Data and Controlwith Weak Reachability Invariants -- Generalized Reversible Rules -- An Assume-Guarantee Rule for Checking Simulation -- Three Approaches to Hardware Verification: HOL, MDG, and VIS Compared -- An Instruction Set Process Calculus -- Techniques for Implicit State Enumeration of EFSMs -- Model Checking on Product Structures -- BDDNOW: A Parallel BDD Package -- Model Checking VHDL with CV -- Alexandria: A Tool for Hierarchical Verification -- PV: An Explicit Enumeration Model-Checker. | |
| 650 | 0 | _aComputer-aided engineering. | |
| 650 | 0 | _aComputers. | |
| 650 | 0 | _aComputer science. | |
| 650 | 0 | _aMachine theory. | |
| 650 | 0 | _aDynamics. | |
| 650 | 0 | _aNonlinear theories. | |
| 650 | 1 | 4 | _aComputer-Aided Engineering (CAD, CAE) and Design. |
| 650 | 2 | 4 | _aComputer Hardware. |
| 650 | 2 | 4 | _aComputer Science Logic and Foundations of Programming. |
| 650 | 2 | 4 | _aFormal Languages and Automata Theory. |
| 650 | 2 | 4 | _aApplied Dynamical Systems. |
| 700 | 1 |
_aGopalakrishnan, Ganesh. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
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| 700 | 1 |
_aWindley, Phillip. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
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| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer Nature eBook | |
| 776 | 0 | 8 |
_iPrinted edition: _z9783540651918 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783662204689 |
| 830 | 0 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v1522 |
|
| 856 | 4 | 0 | _uhttps://doi.org/10.1007/3-540-49519-3 |
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