000 | 04086nam a22007095i 4500 | ||
---|---|---|---|
001 | 978-3-540-36574-7 | ||
003 | DE-He213 | ||
005 | 20240423132456.0 | ||
007 | cr nn 008mamaa | ||
008 | 121227s2003 gw | s |||| 0|eng d | ||
020 |
_a9783540365747 _9978-3-540-36574-7 |
||
024 | 7 |
_a10.1007/3-540-36574-5 _2doi |
|
050 | 4 | _aTK7885-7895 | |
050 | 4 | _aTK5105.5-5105.9 | |
072 | 7 |
_aUK _2bicssc |
|
072 | 7 |
_aCOM067000 _2bisacsh |
|
072 | 7 |
_aUK _2thema |
|
082 | 0 | 4 |
_a621.39 _223 |
082 | 0 | 4 |
_a004.6 _223 |
245 | 1 | 0 |
_aAlgorithms for Memory Hierarchies _h[electronic resource] : _bAdvanced Lectures / _cedited by Ulrich Meyer, Peter Sanders, Jop Sibeyn. |
250 | _a1st ed. 2003. | ||
264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2003. |
|
300 |
_aXV, 429 p. _bonline resource. |
||
336 |
_atext _btxt _2rdacontent |
||
337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
347 |
_atext file _bPDF _2rda |
||
490 | 1 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v2625 |
|
505 | 0 | _aMemory Hierarchies — Models and Lower Bounds -- Basic External Memory Data Structures -- A Survey of Techniques for Designing I/O-Efficient Algorithms -- Elementary Graph Algorithms in External Memory -- I/O-Efficient Algorithms for Sparse Graphs -- External Memory Computational Geometry Revisited -- Full-Text Indexes in External Memory -- Algorithms for Hardware Caches and TLB -- Cache Oblivious Algorithms -- An Overview of Cache Optimization Techniques and Cache-Aware Numerical Algorithms -- Memory Limitations in Artificial Intelligence -- Algorithmic Approaches for Storage Networks -- An Overview of File System Architectures -- Exploitation of the Memory Hierarchy in Relational DBMSs -- Hierarchical Models and Software Tools for Parallel Programming -- Case Study: Memory Conscious Parallel Sorting. | |
520 | _a Algorithms that have to process large data sets have to take into account that the cost of memory access depends on where the data is stored. Traditional algorithm design is based on the von Neumann model where accesses to memory have uniform cost. Actual machines increasingly deviate from this model: while waiting for memory access, nowadays, microprocessors can in principle execute 1000 additions of registers; for hard disk access this factor can reach six orders of magnitude. The 16 coherent chapters in this monograph-like tutorial book introduce and survey algorithmic techniques used to achieve high performance on memory hierarchies; emphasis is placed on methods interesting from a theoretical as well as important from a practical point of view. | ||
650 | 0 | _aComputer engineering. | |
650 | 0 | _aComputer networks . | |
650 | 0 | _aAlgorithms. | |
650 | 0 | _aSoftware engineering. | |
650 | 0 | _aOperating systems (Computers). | |
650 | 0 | _aInformation retrieval. | |
650 | 0 | _aComputer architecture. | |
650 | 0 | _aData structures (Computer science). | |
650 | 0 | _aInformation theory. | |
650 | 1 | 4 | _aComputer Engineering and Networks. |
650 | 2 | 4 | _aAlgorithms. |
650 | 2 | 4 | _aSoftware Engineering. |
650 | 2 | 4 | _aOperating Systems. |
650 | 2 | 4 | _aData Storage Representation. |
650 | 2 | 4 | _aData Structures and Information Theory. |
700 | 1 |
_aMeyer, Ulrich. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
|
700 | 1 |
_aSanders, Peter. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
|
700 | 1 |
_aSibeyn, Jop. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783540008835 |
776 | 0 | 8 |
_iPrinted edition: _z9783662190630 |
830 | 0 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v2625 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/3-540-36574-5 |
912 | _aZDB-2-SCS | ||
912 | _aZDB-2-SXCS | ||
912 | _aZDB-2-LNC | ||
912 | _aZDB-2-BAE | ||
942 | _cSPRINGER | ||
999 |
_c188164 _d188164 |