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082 0 4 _a004.22
_223
245 1 0 _aHigh Performance Computing
_h[electronic resource] :
_bThird International Symposium, ISHPC 2000 Tokyo, Japan, October 16-18, 2000 Proceedings /
_cedited by Mateo Valero, Kazuki Joe, Masaru Kitsuregawa, Hidehiko Tanaka.
250 _a1st ed. 2000.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c2000.
300 _aXV, 598 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aLecture Notes in Computer Science,
_x1611-3349 ;
_v1940
505 0 _aInvited Papers -- Instruction Level Distributed Processing: Adapting to Future Technology -- Macroservers: An Object-Based Programming and Execution Model for Processor-in-Memory Arrays -- The New DRAM Interfaces: SDRAM, RDRAM and Variants -- Blue Gene -- Earth Simulator Project in Japan -- Compilers, Architectures and Evaluation -- Limits of Task-based Parallelism in Irregular Applications -- The Case for Speculative Multithreading on SMT Processors -- Loop Termination Prediction -- Compiler-Directed Cache Assist Adaptivity -- Skewed Data Partition and Alignment Techniques for Compiling Programs on Distributed Memory Multicomputers -- Processor Mechanisms for Software Shard Memory -- An Evaluation of Page Aggregation Technique on Different DSM Systems -- Nanothreads vs. Fibers for the Support of Fine Grain Parallelism on Windows NT/2000 Platforms -- Algorithms, Models and Applications -- Partitioned Parallel Radix Sort -- Transonic Wing Shape Optimization Based on Evolutionary Algorithms -- A Common CFD Platform UPACS -- On Performance Modeling for HPF Applications with ASL -- A “Generalized k-Tree-Based Model to Sub-system Allocation” for Partitionable Multi-dimensional Mesh-Connected Architectures -- An Analytic Model or Communication Latency in Wormhole-Switched k -Ary n -Cube Interconnection Networks with Digit-Reversal Traffic -- Performance Sensitivity of Routing Algorithms to Failures in Networks of Workstations -- Short Papers -- Decentralized Load Balancing in Multi-node Broadcast Schemes for Hypercubes -- Design and Implementation of an Efficient Thread Partitioning Algorithm -- A Flexible Routing Scheme for Networks of Workstations -- Java Bytecode Optimization with Advanced Instruction Folding Mechanism -- Performance Evaluation of a Java Based Chat System -- Multi-nodeBroadcasting in All-Ported 3-D Wormhole-Routed Torus Using Aggregation-then-Distribution Strategy -- On the Influence of the Selection Function on the Performance of Networks of Workstations -- Combining In-Transit Buffers with Optimized Routing Schemes to Boost the Performance of Networks with Source Routing -- A Comparison of Locality-Based and Recency-Based Replacement Policies -- The Filter Data Cache: A Tour Management Comparison with Related Split Data Cache Schemes Sensitive to Data Localities -- Global Magneto-Hydrodynamic Simulations of Differentially Rotating Accretion Disk by Astrophysical Rotational Plasma Simulator -- Exploring Multi-level Parallelism in Cellular Automata Networks -- Orgel: An Parallel Programming Language with Declarative Communication Streams -- BS?ppp: Functional BSP Programs on Enumerated Vectors -- Ability of Classes of Dataow Schemata with Timing Dependency -- A New Model of Parallel Distributed Genetic Algorithms for Cluster Systems: Dual Individual DGAs -- International Workshop on OpenMP: Experiences and Implementations (WOMPEI) -- An Introduction to OpenMP 2.0 -- Implementation and Evaluation of OpenMP for Hitachi SR8000 -- Performance Evaluation of the Omni OpenMP Compiler -- Leveraging Transparent Data Distribution in OpenMP via User-Level Dynamic Page Migration -- Formalizing OpenMP Performance Properties with ASL -- Automatic Generation of OpenMP Directives and Its Application to Computational Fluid Dynamics Codes -- Coarse-grain Task Parallel Processing Using the OpenMP Backend of the OSCAR Multigrain Parallelizing Compiler -- Impact of OpenMP Optimizations for the MGCG Method -- Quantifying Differences between OpenMP and MPI Using a Large-Scale Application Suite -- International Workshop on Simulation and Visualization (IWSV) -- Large ScaleParallel Direct Numerical Simulation of a Separating Turbulent Boundary Layer Flow over a Flat Plate Using NAL Numerical Wind Tunnel -- Characterization of Disorderd Networks in Vitreous SiO2 and Its Rigidity by Molecular-Dynamics Simulations on Parallel Computers -- Direct Numerical Simulation of Coherent Structure in Turbulent Open-Channel Flows with Heat Transfer -- High Reynolds Number Computation for Turbulent Heat Transfer in a Pipe Flow -- Large-Scale Simulation System and Advanced Photon Research -- Parallelization, Vectorization and Visualization of Large Scale Plasma Particle Simulations and Its Application to Studies of Intense Laser Interactions -- Fast LIC Image Generation Based on Significance Map -- Fast Isosurface Generation Using the Cell-Edge Centered Propagation Algorithm -- Fast Ray-Casting for Irregular Volumes -- A Study on the Effect of Air on the Dynamic Motion of a MEMS Device and Its Shape Optimization -- A Distributed Rendering System “On Demand Rendering System”.
520 _aI wish to welcome all of you to the International Symposium on High Perf- mance Computing 2000 (ISHPC 2000) in the megalopolis of Tokyo. After having two great successes with ISHPC’97 (Fukuoka, November 1997) and ISHPC’99 (Kyoto, May 1999), many people have requested that the symposium would be held in the capital of Japan and we have agreed. I am very pleased to serve as Conference Chair at a time when high p- formance computing (HPC) has a signi?cant in?uence on computer science and technology. In particular, HPC has had and will continue to have a signi?cant - pact on the advanced technologies of the “IT” revolution. The many conferences and symposiums that are held on the subject around the world are an indication of the importance of this area and the interest of the research community. One of the goals of this symposium is to provide a forum for the discussion of all aspects of HPC (from system architecture to real applications) in a more informal and personal fashion. Today we are delighted to have this symposium, which includes excellent invited talks, tutorials and workshops, as well as high quality technical papers.
650 0 _aMicroprocessors.
650 0 _aComputer architecture.
650 0 _aSoftware engineering.
650 0 _aComputer programming.
650 0 _aCompilers (Computer programs).
650 0 _aAlgorithms.
650 0 _aComputer science
_xMathematics.
650 1 4 _aProcessor Architectures.
650 2 4 _aSoftware Engineering.
650 2 4 _aProgramming Techniques.
650 2 4 _aCompilers and Interpreters.
650 2 4 _aAlgorithms.
650 2 4 _aMathematics of Computing.
700 1 _aValero, Mateo.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aJoe, Kazuki.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aKitsuregawa, Masaru.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aTanaka, Hidehiko.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
710 2 _aSpringerLink (Online service)
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783540411284
776 0 8 _iPrinted edition:
_z9783662212943
830 0 _aLecture Notes in Computer Science,
_x1611-3349 ;
_v1940
856 4 0 _uhttps://doi.org/10.1007/3-540-39999-2
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