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020 _a9783540361268
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024 7 _a10.1007/3-540-36126-X
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072 7 _aCOM007000
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072 7 _aUGC
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082 0 4 _a670.285
_223
245 1 0 _aFormal Methods in Computer-Aided Design
_h[electronic resource] :
_b4th International Conference, FMCAD 2002, Portland, OR, USA, November 6-8, 2002, Proceedings /
_cedited by Mark D. Aagaard, John W. O'Leary.
250 _a1st ed. 2002.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c2002.
300 _aXII, 408 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
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490 1 _aLecture Notes in Computer Science,
_x1611-3349 ;
_v2517
505 0 _aAbstraction -- Abstraction by Symbolic Indexing Transformations -- Counter-Example Based Predicate Discovery in Predicate Abstraction -- Automated Abstraction Refinement for Model Checking Large State Spaces Using SAT Based Conflict Analysis -- Symbolic Simulation -- Simplifying Circuits for Formal Verification Using Parametric Representation -- Generalized Symbolic Trajectory Evaluation — Abstraction in Action -- Model Checking: Strongly-Connected Components -- Analysis of Symbolic SCC Hull Algorithms -- Sharp Disjunctive Decomposition for Language Emptiness Checking -- Microprocessor Specification and Verification -- Relating Multi-step and Single-Step Microprocessor Correctness Statements -- Modeling and Verification of Out-of-Order Microprocessors in UCLID -- Decision Procedures -- On Solving Presburger and Linear Arithmetic with SAT -- Deciding Presburger Arithmetic by Model Checking and Comparisons with Other Methods -- Qubos: Deciding Quantified Boolean Logic Using Propositional Satisfiability Solvers -- Model Checking: Reachability Analysis -- Exploiting Transition Locality in the Disk Based Mur? Verifier -- Traversal Techniques for Concurrent Systems -- Model Checking: Fixed Points -- A Fixpoint Based Encoding for Bounded Model Checking -- Using Edge-Valued Decision Diagrams for Symbolic Generation of Shortest Paths -- Verification Techniques and Methodology -- Mechanical Verification of a Square Root Algorithm Using Taylor’s Theorem -- A Specification and Verification Framework for Developing Weak Shared Memory Consistency Protocols -- Model Checking the Design of an Unrestricted, Stuck-at Fault Tolerant, Asynchronous Sequential Circuit Using SMV -- Hardware Description Languages -- Functional Design Using Behavioural and Structural Components -- Compiling Hardware Descriptions withRelative Placement Information for Parametrised Libraries -- Prototyping and Synthesis -- Input/Output Compatibility of Reactive Systems -- Smart Play-out of Behavioral Requirements.
520 _aThis volume contains the proceedings of the Fourth Biennial Conference on F- mal Methods in Computer-Aided Design (FMCAD). The conference is devoted to the use of mathematical methods for the analysis of digital hardware c- cuits and systems. The workreported in this bookdescribes the use of formal mathematics and associated tools to design and verify digital hardware systems. Functional veri?cation has become one of the principal costs in a modern computer design e?ort. FMCAD provides a venue for academic and industrial researchers and practitioners to share their ideas and experiences of using - screte mathematical modeling and veri?cation. Over the past 20 years, this area has grown from just a few academic researchers to a vibrant worldwide com- nity of people from both academia and industry. This volume includes 23 papers selected from the 47 submitted papers, each of which was reviewed by at least three program committee members. The history of FMCAD dates backto 1984, when the earliest meetings on this topic occurred as part of IFIP WG10.2.
650 0 _aComputer-aided engineering.
650 0 _aComputers.
650 0 _aSoftware engineering.
650 0 _aComputer science.
650 0 _aMachine theory.
650 0 _aElectrical engineering.
650 1 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
650 2 4 _aComputer Hardware.
650 2 4 _aSoftware Engineering.
650 2 4 _aComputer Science Logic and Foundations of Programming.
650 2 4 _aFormal Languages and Automata Theory.
650 2 4 _aElectrical and Electronic Engineering.
700 1 _aAagaard, Mark D.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aO'Leary, John W.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
710 2 _aSpringerLink (Online service)
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783540001164
776 0 8 _iPrinted edition:
_z9783662198865
830 0 _aLecture Notes in Computer Science,
_x1611-3349 ;
_v2517
856 4 0 _uhttps://doi.org/10.1007/3-540-36126-X
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