000 | 04391nam a22006375i 4500 | ||
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001 | 978-3-540-36190-9 | ||
003 | DE-He213 | ||
005 | 20240423132557.0 | ||
007 | cr nn 008mamaa | ||
008 | 121227s2002 gw | s |||| 0|eng d | ||
020 |
_a9783540361909 _9978-3-540-36190-9 |
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024 | 7 |
_a10.1007/3-540-36190-1 _2doi |
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050 | 4 | _aQA76.758 | |
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_aUMZ _2bicssc |
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_aCOM051230 _2bisacsh |
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245 | 1 | 0 |
_aConcurrency and Hardware Design _h[electronic resource] : _bAdvances in Petri Nets / _cedited by Jordi Cortadella, Alex Yakovlev, Grzegorz Rozenberg. |
250 | _a1st ed. 2002. | ||
264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2002. |
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300 |
_aX, 346 p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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_acomputer _bc _2rdamedia |
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_aonline resource _bcr _2rdacarrier |
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_atext file _bPDF _2rda |
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490 | 1 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v2549 |
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505 | 0 | _aFormal Models -- Composing Snippets -- A Programming Approach to the Design of Asynchronous Logic Blocks -- Asynchronous Circuits -- GALA (Globally Asynchronous — Locally Arbitrary) Design -- Synthesis of Reactive Systems: Application to Asynchronous Circuit Design -- Decomposition in Asynchronous Circuit Design -- Embedded System Design -- Functional and Performance Modeling of Concurrency in VCC -- Modeling and Designing Heterogeneous Systems -- Timed Verification and Performance Analysis -- Timed Verification of Asynchronous Circuits -- Performance Analysis of Asynchronous Circuits Using Markov Chains. | |
520 | _aAs CMOS semiconductor technology strides towards billions of transistors on a single die new problems arise on the way. They are concerned with the - minishing fabrication process features, which a?ect for example the gate-to-wire delay ratio. They manifest themselves in greater variations of size and operating parameters of devices, which put the overall reliability of systems at risk. And, most of all, they have tremendous impact on design productivity, where the costs of utilizing the growing silicon ‘real estate’ rocket to billions of dollars that have to be spent on design, veri?cation, and testing. All such problems call for new - sign approaches and models for digital systems. Furthermore, new developments in non-CMOS technologies, such as single-electron transistors, rapid single-?- quantum devices, quantum dot cells, molecular devices, etc. , add extra demand for new research in system design methodologies. What kind of models and design methodologies will be required to build systems in all these new technologies? Answering this question, even for each particular type of new technology generation, is not easy, especially because sometimes it is not even clear what kind of elementary devices are feasible there. This problem is of an interdisciplinary nature. It requires an bridges between di?erent scienti?c communities. The bridges must be built very quickly, and be maximally ?exible to accommodate changes taking place in a logarithmic timescale. | ||
650 | 0 | _aSoftware engineering. | |
650 | 0 | _aComputers. | |
650 | 0 | _aComputer engineering. | |
650 | 0 | _aComputer networks . | |
650 | 0 | _aComputer science. | |
650 | 0 | _aMachine theory. | |
650 | 1 | 4 | _aSoftware Engineering. |
650 | 2 | 4 | _aComputer Hardware. |
650 | 2 | 4 | _aComputer Engineering and Networks. |
650 | 2 | 4 | _aTheory of Computation. |
650 | 2 | 4 | _aFormal Languages and Automata Theory. |
700 | 1 |
_aCortadella, Jordi. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
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700 | 1 |
_aYakovlev, Alex. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
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700 | 1 |
_aRozenberg, Grzegorz. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
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710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783540001997 |
776 | 0 | 8 |
_iPrinted edition: _z9783662176610 |
830 | 0 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v2549 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/3-540-36190-1 |
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942 | _cSPRINGER | ||
999 |
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