000 | 01309nam a22003617i 4500 | ||
---|---|---|---|
001 | 20097045 | ||
003 | IIITD | ||
005 | 20210206170149.0 | ||
008 | 171026t20172017nyua b 001 0 eng c | ||
010 | _a 2017446855 | ||
020 | _a9789387067509 | ||
035 | _a(OCoLC)ocn959648624 | ||
040 |
_aYDX _beng _cYDX _erda _dOCLCQ _dTEF _dBDX _dYDX _dOCLCF _dOSU _dDLC |
||
042 | _apcc | ||
050 | 0 | 0 |
_aTK7895.G36 _bU57 2017 |
082 |
_a621 _bUNS-D |
||
100 | 1 | _aUnsalan, Cem | |
245 | 1 | 0 |
_aDigital system design with FPGA : _bimplementation using Verilog and VHDL _cby Cem Ünsaln and Bora Tar. |
260 |
_aDelhi : _bMcGraw-Hill, _c©2017. |
||
300 |
_axv, 384 p. : _bill. ; _c25 cm. |
||
500 | _aIndian ed. | ||
504 | _aIncludes bibliographical references and index. | ||
650 | 0 | _aField programmable gate arrays. | |
650 | 0 | _aVerilog (Computer hardware description language) | |
650 | 0 | _aVHDL (Computer hardware description language) | |
650 | 7 |
_aField programmable gate arrays. _2fast |
|
650 | 7 |
_aVerilog (Computer hardware description language) _2fast |
|
650 | 7 |
_aVHDL (Computer hardware description language) _2fast |
|
700 | 1 | _aTar, Bora | |
906 |
_a7 _bcbc _cpccadap _d2 _encip _f20 _gy-gencatlg |
||
942 |
_2ddc _cBK _010 |
||
999 |
_c23979 _d23979 |