000			01329cam a22003374a 4500
001			14803892
005			20191214020003.0
008			070411s2007 nyua b 001 0 eng c
010			_a 2007926706
020			_a9788184894608
035			_a(OCoLC)ocn154711862
040			_aBTCTA _cBTCTA _dBAKER _dYDXCP _dINT _dIQU _dOHX _dAU@ _dSTF _dDLC
042			_apcc
050	0	0	_aTK7885.7 _b.S879 2007
082	0	0	_a621.390 _223 _bSUT-V
100	1		_aSutherland, Stuart
245	1	0	_aVerilog and system verilog gotchas : _b101 common coding errors and how to avoid them _cStuart Sutherland, Don Mills.
246	3		_aVerilog gotchas
246	3	0	_aSystem Verilog gotchas
260			_aNew York : _bSpringer, _cc2007.
300			_axxii, 214 p. : _bill. ; _c24 cm.
504			_aIncludes bibliographical references and index.
650		0	_aVerilog (Computer hardware description language)
700	1		_aMills, Don
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy1301/2007926706-d.html
856	4	1	_3Table of contents only _uhttp://www.loc.gov/catdir/enhancements/fy1301/2007926706-t.html
906			_a7 _bcbc _cpccadap _d2 _eepcn _f20 _gy-gencatlg
942			_2ddc _cBK _03
999			_c8357 _d8357