000 01235cam a2200313 a 4500
001 2144392
003 IIITD
005 20200307020003.0
008 980929s1999 maua b 001 0 eng
010 _a 98044779
020 _a0792383931
020 _a9788181283177
040 _aDLC
_cDLC
_dDLC
050 0 0 _aTK7874
_b.S455 1999
082 0 0 _a621.395
_221
_bSHE-A
100 1 _aSherwani, N. A.
_q(Naveed A.)
245 1 0 _aAlgorithms for VLSI physical design automation
_cNaveed A. Sherwani.
250 _a3rd ed.
260 _aNew Delhi :
_bSpringer,
_cc1999.
300 _axxx, 572 p. :
_bill. ;
_c24 cm.
504 _aIncludes bibliographical references (p. [525]-561) and indexes.
650 0 _aIntegrated circuits
_xVery large scale integration
_xComputer-aided design.
650 0 _aAlgorithms.
856 4 2 _3Publisher description
_uhttp://www.loc.gov/catdir/enhancements/fy0820/98044779-d.html
856 4 1 _3Table of contents only
_uhttp://www.loc.gov/catdir/enhancements/fy0820/98044779-t.html
906 _a7
_bcbc
_corignew
_d1
_eocip
_f19
_gy-gencatlg
942 _2ddc
_cBK
_05
999 _c8514
_d8514