Computer architecture :

Flynn, Michael J.

Computer architecture : pipelined and parallel processor design Michael J. Flynn. - New Delhi : Narosa, c1995. - xix, 788 p. : ill. ; 26 cm.

Includes bibliographical references and index.

Architecture and Machines -- Time, Area, and Instruction Sets -- Data: How Programs Behave -- Pipelined Processor Design -- Cache Memory -- Memory System Design -- Concurrent Processors -- Shared Memory Multiprocessors -- I/O and the Storage Hierarchy -- Processor Studies -- Appendix A DTMR Cache Miss Rates -- Appendix B SPECmark vs. DTMR Cache Performance -- Appendix C Modeling System Effects in Caches -- Appendix D New DRAM Technologies -- Appendix E M/G/1 Queues -- Appendix F Some Details on Bus-Based Protocols. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10.

9788173191008

94041225


Computer architecture.
Microprocessors--Design and construction.

QA76.9.A73 / F58 1995

004.22 / FLY-C
© 2024 IIIT-Delhi, library@iiitd.ac.in