Defect-oriented testing for nano-metric CMOS VLSI circuits
Material type: TextSeries: Frontiers in electronic testing ; 34.Publication details: Dordrecht : Springer, c2007.Edition: 2nd edDescription: xxi, 328 p. : ill. ; 24 cmISBN:- 9788184894295
- 621.395 SAC-D
- TK7871.99.M44 S23 2007
Item type | Current library | Collection | Call number | Status | Date due | Barcode | Item holds |
---|---|---|---|---|---|---|---|
Books | IIITD General Stacks | Electronics and Communication Engineering | 621.395 SAC-D (Browse shelf(Opens below)) | Available | 002602 |
Total holds: 0
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621.395 RAM-D Digital VLSI systems design : | 621.395 RAS-S System-On-A-Chip verification : | 621.395 ROY-L Low-power CMOS VLSI circuit design | 621.395 SAC-D Defect-oriented testing for nano-metric CMOS VLSI circuits | 621.395 SAS-S Switching theory for logic synthesis | 621.395 SAU-I Introduction to VLSI design flow | 621.395 SAU-I Introduction to VLSI design flow |
New edition of: Defect oriented testing for CMOS analog and digital circuits, 1998.
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